T states of 8085 instructions

 

 

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The various T states required for instructions are: 1. STAX: 1 opcode fetch (4T) 1 memory write (3T) Total 7T states 2. SPHL 1 Opcode Fetch (6T) 3. SIM. Step 4 : (State T4) In T4, microprocessor decodes the opcode, and on the basis of the instruction received, it decides whether to enter state T5 or to enterIn the second T-state of the last machine cycle of every instruction, the 8085 processor checks whether an interrupt request is made or not. 35. Why interfacing

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